The present invention relates to a semiconductor device and method for producing it. More specifically, the present invention relates to field-effect transistors using III-V compound semiconductors and to bipolar transistors.
For example, to produce GaAs/AlGaAs heterojunction field-effect transistors exhibiting a sophisticated performance, it is necessary to reduce the source resistance. In this case, a method for reducing the source resistance by using a heavily doped contact layer formed by selective growth as a contact part between the source electrode and the semiconductor layer has been contemplated.
For example, the following method is mentioned in the specification of Japanese Patent Application No. 2-268361, which is not prior art to the present application.
FIG. 2 is a sectional view of the field-effect transistor of Japanese Patent Application No. 2-268361. An active layer having an n-type GaAs channel layer 105 on a semi-insulating GaAs substrate 1 is subjected to epitaxial growth, and the active layer at the contact part is removed by etching, and then a heavily doped n-type GaAs contact layer 8 is selectively grown at the contact part using a metal oxide chemical vapor deposition (MOCVD) method. According to this method, the source resistance is reduced by a structure that the channel layer 105 is in direct contact with the contact layer 8.
Furthermore, to produce GaAs/AlGaAs heterojunction bipolar transistors exhibiting a sophisticated performance, it is necessary to reduce the base resistance. Also in this case, a method for reducing the base resistance by using a heavily doped contact layer formed by selective growth has been contrived. (For example, the method is described on page 25 of Shingakugiho ED90-136.)